Here, we present a protocol to develop high-performance GaP/Si heterojunction solar cells with a high Si minority-carrier lifetime.
To improve the efficiency of Si-based solar cells beyond their Shockley-Queisser limit, the optimal path is to integrate them with III-V-based solar cells. In this work, we present high performance GaP/Si heterojunction solar cells with a high Si minority-carrier lifetime and high crystal quality of epitaxial GaP layers. It is shown that by applying phosphorus (P)-diffusion layers into the Si substrate and a SiNx layer, the Si minority-carrier lifetime can be well-maintained during the GaP growth in the molecular beam epitaxy (MBE). By controlling the growth conditions, the high crystal quality of GaP was grown on the P-rich Si surface. The film quality is characterized by atomic force microscopy and high-resolution x-ray diffraction. In addition, MoOx was implemented as a hole-selective contact that led to a significant increase in the short-circuit current density. The achieved high device performance of the GaP/Si heterojunction solar cells establishes a path for further enhancement of the performance of Si-based photovoltaic devices.
There has been a continuing effort on the integration of different materials with lattice mismatches in order to enhance overall solar cell efficiency1,2. The III-V/Si integration has the potential to further increase the current Si solar cell efficiency and replace the expensive III-V substrates (such as GaAs and Ge) with a Si substrate for multijunction solar cell applications. Among all III-V binary material systems, gallium phosphide (GaP) is a good candidate for this purpose, as it has the smallest lattice-mismatch (~0.4%) with Si and a high indirect bandgap. These features can enable high-quality integration of GaP with Si substrate. It has been theoretically shown that GaP/Si heterojunction solar cells could enhance the efficiency of conventional passivated emitter rear Si solar cells3,4 by benefiting from the unique band-offset between GaP and Si (∆Ev ~1.05 eV and ∆Ec ~0.09 eV). This makes GaP a promising electron selective contact for silicon solar cells. However, in order to achieve high-performance GaP/Si heterojunction solar cells, a high Si bulk lifetime and high GaP/Si interface quality are required.
During the growth of III-V materials on a Si substrate by molecular beam epitaxy (MBE) and metalorganic vapor phase epitaxy (MOVPE), significant Si lifetime degradation has been widely observed5,6,7,8,9. It was revealed that the lifetime degradation mainly happens during the thermal treatment of the Si wafers in the reactors, which is required for surface oxide desorption and/or surface reconstruction before the epitaxial growth10. This degradation was ascribed to the extrinsic diffusion of contaminants originated from the growth reactors5,7. Several approaches have been proposed to suppress this Si lifetime degradation. In our previous work, we have demonstrated two methods in which the Si lifetime degradation can be significantly suppressed. The first method was demonstrated by the introduction of SiNx as a diffusion barrier7 and the second one by introducing the P-diffusion layer as a gettering agent11 to the Si substrate.
In this work, we have demonstrated high-performance GaP/Si solar cells based on the aforementioned approaches to mitigate the silicon bulk lifetime degradation. The techniques used to preserve the Si lifetime can have broad applications in multijunction solar cells with active Si bottom cells and electronic devices such as high-mobility CMOS. In this detailed protocol, the fabrication details of GaP/Si heterojunction solar cells, including Si wafer cleaning, P-diffusion in the furnace, GaP growth, and GaP/Si solar cells processing, are presented.
CAUTION: Please consult all relevant material safety data sheets (MSDS) before dealing with chemicals. Please use all appropriate safety practices when performing a solar cell fabrication including the fume hood and personal protective equipment (safety glasses, gloves, lab coat, full-length pants, closed-toe shoes).
1. Si Wafer Cleaning
2. P-diffusion in the Diffusion Furnace
3. SiNx coating by PECVD
4. GaP Growth by MBE
5. Remove Back n+ and SiNx Layers by Wet Etching
6. Hole-Selective Contact Formation on the Bare Si Side
7. External Contact Formation
Atomic force microscopy (AFM) images and high-resolution x-ray diffraction (XRD) scans, including the rocking curve in the vicinity of the (004) reflection and the reciprocal space map (RSM) in the vicinity of (224) reflection, were collected for the GaP/Si structure (Figure 1). The AFM was used to characterize the surface morphology of the MBE-grown GaP and XRD was used to examine the crystal quality of GaP layer. The effective minority-carrier lifetime of the GaP/Si structure and Si bulk were measured to examine the effectiveness of the lifetime preserving methods used in this work. External quantum efficiency (EQE), surface reflection, pseudo light J-V (Suns-Voc), and light J-V of the GaP/Si final devices were collected (Figure 2). The internal quantum efficiency (IQE) was generated from the reflection corrected EQE data. The light and pseudo J-V parameters are listed in Table 1. Efficiencies of 13.1% and 14.1% with an open-circuit voltage (Voc) of 618 mV and 598 mV are achieved from Structure A and B, respectively. The MoOx layer in Structure B as a hole-selective contact performed better than better than the a-Si: H in Structure A.
Figure 1: Characterization of the GaP layer of the GaP/Si structure. (a) 1 x 1 μm2 AFM image of the 25 nm-thick GaP surface. (b) The coherent double crystal (DC) ω-2θ rocking curve (black) in the vicinity of Si and GaP (004) reflections (a fitted curve (red) of the structure is also presented). (c) Reciprocal space map of (224) diffraction spots. Please click here to view a larger version of this figure.
Figure 2: Electrical characteristics of the GaP/Si heterojunction devices. (a) The effective minority-carrier lifetime of GaP/Si structure (black dots) and Si bulk lifetime (red dots). (b) The IQE and surface reflection spectra of a-Si/Si/GaP (Structure A) (black) and MoOx/Si/GaP (Structure B) (blue). (c) Light J-V (black) and pseudo light J-V (red) of a-Si/Si/GaP device. (d) Light J-V (black) and pseudo light J-V (red) of MoOx/Si/GaP device. Please click here to view a larger version of this figure.
VOC | JSC | FF | FF0 | WOC | η | η0 | |
(mV) | (mA/cm2) | (%) | (%) | (mV) | (%) | (%) | |
Structure A | 618 | 33.1 | 64 | 80 | 522 | 13.1 | 16.5 |
Structure B | 598 | 34.3 | 69 | 80 | 542 | 14.1 | 16.9 |
Table 1. Light and pseudo J-V values for GaP/Si heterojunctions solar cells.
A nominal 25 nm-thick GaP layer was epitaxially grown on a P-rich Si surface via MBE. To grow a better quality of GaP layer on Si substrates, a relatively low V/III (P/Ga) ratio is preferable. A good crystal quality of GaP layer is necessary to achieve high conductivity and low density of recombination centers. The AFM root-mean-square (RMS) of the GaP surface is ~0.52 nm showing a smooth surface with no pits, indicative of high crystal quality with a low threading dislocation density (Figure 1a). Further, pendellosung fringes were observed from the ω-2θ rocking curve (Figure 1b) indicative of smooth interfaces. The full width at half maximum (FWHM) of the GaP peak measured from the triple crystal ω rocking curve is ~14 arcsec and the threading dislocation density calculated is ~2×106 cm-2. The RSM (Figure 1c) in the vicinity of (224) diffraction spots of the GaP/Si sample shows coherent GaP and Si peaks, which indicates GaP is fully strained to the Si substrate with good crystalline quality.
The critical step of achieving high-performance Si-based solar cells is to maintain high Si minority-carrier lifetimes throughout the deposition of GaP. It is shown that by inserting the n+ layer before the GaP growth, the Si bulk lifetime can be well-maintained (up to a milliseconds level). In addition, the GaP/Si lifetime was measured to be ~100 μs after GaP growth in the MBE chamber. The achieved high lifetime of Si indicates a promising device performance (as shown in the Figure 2c). The light and pseudo J-V parameters for GaP/Si heterojunctions solar cells (a-Si/Si/GaP (Structure A) and MoOx/Si/GaP (Structure B)) are listed in Table 1, measured under an AM1.5G condition with irradiation intensity of 1 kW m-2. While ITO and Ag were applied as the contact layers to the GaP layer in this work, however, to achieve better performance of GaP/Si solar cells, it is recommended to optimize ITO thickness, transparency, and its conductivity.
In this work, MoOx was also used as a hole selective contact to further improve the carrier collection efficiency at short wavelengths. Benefitting from the higher bandgap of MoOx compared to the a-Si layers, the IQE shows a boost at the short wavelength regime (300 – 600 nm). The MoOx/Si/GaP solar cell demonstrated a better performance than the best performing MoOx/Si solar cells reported in the literature12 without inserting the passivation layer between MoOx and Si interface.
Although a high Si bulk lifetime can be achieved from the aforementioned approach, the minority-carrier lifetime of GaP/Si structure is still not comparable to a-Si passivated structures, which implies that the GaP layer quality should be further improved. The demonstrated approach which requires a diffusion step and SiNx coating layer could affect the surface quality of the Si; hence, the subsequent GaP crystal quality can be impacted. Furthermore, x-ray photoelectron spectroscopy (XPS) and secondary-ion mass spectrometry (SIMS) can be conducted to investigate the P-diffusion profile in this structure.
In this work, we have demonstrated the high-performance GaP/Si heterojunction solar cells by inserting n+ layers into Si substrates before the GaP growth. This protocol can be applied to maintain a high minority-carrier lifetime of Si while epitaxially growing not only GaP (presented here) but also to other III-V or II-VI materials to achieve heterojunction devices. Furthermore, multijunction solar cells with high-performance Si bottom cells can be realized by this approach.
The authors have nothing to disclose.
The authors would like to thank L. Ding and M. Boccard for their contributions in processing and testing of the solar cells in this study. The authors acknowledge funding from the U.S. Department of Energy under contract DE-EE0006335 and the Engineering Research Center Program of the National Science Foundation and the Office of Energy Efficiency and Renewable Energy of the Department of Energy under NSF Cooperative Agreement No. EEC-1041895. Som Dahal at Solar Power Lab was supported, in part, by NSF contract ECCS-1542160.
Hydrogen peroxide, 30% | Honeywell | 10181019 | |
Sulfuric acid, 96% | KMG electronic chemicals, Inc. | 64103 | |
Hydrochloric acid, 37% | KMG electronic chemicals, Inc. | 64009 | |
Buffered Oxide Etch 10:1 | KMG electronic chemicals, Inc. | 62060 | |
Hydrofluoric acid, 49% | Honeywell | 10181736 | |
Acetic acid | Honeywell | 10180830 | |
Nitride acid, 69.5% | KMG electronic chemicals, Inc. | 200288 |