6.6:

Kirchoff’s Laws using Phasors

JoVE Core
Electrical Engineering
Bu içeriği görüntülemek için JoVE aboneliği gereklidir.  Oturum açın veya ücretsiz deneme sürümünü başlatın.
JoVE Core Electrical Engineering
Kirchoff’s Laws using Phasors

137 Views

01:12 min

April 11, 2024

Analyzing AC circuits in electrical systems is a fundamental aspect of electrical engineering. In these circuits, AC power is supplied from a distribution panel and wired to various household appliances in parallel. To perform a comprehensive analysis, electrical engineers use Kirchhoff's voltage and current laws, which are equally applicable in AC circuits as in DC circuits.

Kirchhoff's voltage law (KVL) states that the sum of phasor voltages around a closed loop in an AC circuit equals zero. In the sinusoidal steady state, where AC voltages vary sinusoidally with time, these voltages can be represented in the time domain and then converted into phasor equivalents. This process ensures that the sum of the phasor voltages in a closed loop remains zero.

Equation1

Kirchhoff's current law (KCL) applies to circuit nodes, asserting that the total current entering a node equals the total current exiting the node. When expressed in phasor notation, the sum of phasor currents at a node also equals zero.

Equation2

These laws are essential tools for AC circuit analysis and enable engineers to work seamlessly in the frequency domain. They facilitate various tasks such as impedance combination, nodal and mesh analysis, superposition, and source transformation, which are crucial in designing and troubleshooting electrical circuits in residential and industrial settings.