Capacitance multiplier circuits are used in integrated circuits to produce a multiple of a small physical capacitance when a high-value capacitance is required. These circuits are designed using a combination of op-amps, resistors, and capacitors. The first op-amp in the circuit functions as a voltage follower, while the second op-amp acts as an inverting amplifier. The voltage follower isolates the capacitance formed by the circuit from the loading imposed by the inverting amplifier. As no current enters the input terminals of the op-amp, the input current flows through the feedback capacitor. By applying KCL, a relationship between input and output voltage in terms of resistances is obtained, which can be substituted into the current expression. Rearranging the expressions further helps determine the input impedance. By selecting appropriate resistance values, an effective capacitance between the input terminal and ground can be generated, which is a multiple of the physical capacitance. To prevent op-amps from saturating, the effective capacitance is limited by the inverted output voltage. As capacitance multiplication increases, the maximum allowable input voltage must decrease.