This work describes the complete fabrication process of thin absorber cadmium selenium telluride/cadmium telluride photovoltaic devices for enhanced efficiency. The process utilizes an automated in-line vacuum system for close-space sublimation deposition that is scalable, from fabrication of small area research devices as well as large-scale modules.
Developments in photovoltaic device architectures are necessary to make solar energy a cost-effective and reliable source of renewable energy amidst growing global energy demands and climate change. Thin film CdTe technology has demonstrated cost-competitiveness and increasing efficiencies due partially to rapid fabrication times, minimal material usage, and introduction of a CdSeTe alloy into a ~3 μm absorber layer. This work presents the close-space sublimation fabrication of thin, 1.5 µm CdSeTe/CdTe bilayer devices using an automated in-line vacuum deposition system. The thin bilayer structure and fabrication technique minimize deposition time, increase device efficiency, and facilitate future thin absorber-based device architecture development. Three fabrication parameters appear to be the most impactful for optimizing thin CdSeTe/CdTe absorber devices: substrate preheat temperature, CdSeTe:CdTe thickness ratio, and CdCl2 passivation. For proper sublimation of the CdSeTe, the substrate temperature prior to deposition must be ~540 °C (higher than that for CdTe) as controlled by dwell time in a preheat source. Variation in the CdSeTe:CdTe thickness ratio reveals a strong dependence of device performance on this ratio. The optimal absorber thicknesses are 0.5 μm CdSeTe/1.0 μm CdTe, and non-optimized thickness ratios reduce efficiency through back-barrier effects. Thin absorbers are sensitive to CdCl2 passivation variation; a much less aggressive CdCl2 treatment (compared to thicker absorbers) regarding both temperature and time yields optimal device performance. With optimized fabrication conditions, CdSeTe/CdTe increases device short-circuit current density and photoluminescence intensity compared to single-absorber CdTe. Additionally, an in-line close-space sublimation vacuum deposition system offers material and time reduction, scalability, and attainability of future ultra-thin absorber architectures.
Global energy demand is quickly accelerating, and the year 2018 demonstrated the fastest( 2.3%) growth rate in the last decade1. Paired with increasing awareness of the effects of climate change and the burning of fossil fuels, the need for cost-competitive, clean, and renewable energy has become abundantly clear. Of the many renewable energy sources, solar energy is distinctive for its total potential, as the amount of solar energy that reaches earth far exceeds global energy consumption2.
Photovoltaic (PV) devices directly convert solar energy to electrical power and are versatile in scalability (e.g., personal use mini-modules and grid-integrated solar arrays) and material technologies. Technologies such as multi- and single-junction, single-crystal gallium arsenide (GaAs) solar cells have efficiencies reaching 39.2% and 35.5%, respectively3. However, fabrication of these high efficiency solar cells is costly and time-consuming. Polycrystalline cadmium telluride (CdTe) as a material for thin film PVs is advantageous for its low cost, high-throughput fabrication, variety of deposition techniques, and favorable absorption coefficient. These attributes make CdTe propitious for large- scale manufacturing, and improvements in efficiency have made CdTe cost-competitive with PV-market-dominant silicon and fossil fuels4.
One recent advancement that has driven the increase in CdTe device efficiency is the incorporation of cadmium selenium telluride (CdSeTe) alloy material into the absorber layer. Integrating the lower ~1.4 eV band gap CdSeTe material into a 1.5 eV CdTe absorber reduces the front band gap of the bilayer absorber. This increases the photon fraction above the band gap and thus improves current collection. Successful incorporation of CdSeTe into absorbers that are 3 μm or thicker for increased current density has been demonstrated with various fabrication techniques (i.e., close-space sublimation, vapor transport deposition, and electroplating)5,6,7. Increased room temperature photoluminescence emission spectroscopy (PL), time-resolved photoluminescence (TRPL), and electroluminescence signals from bilayer absorber devices5,8 indicate that in addition to increased current collection, the CdSeTe appears to have better radiative efficiency and minority carrier lifetime, and a CdSeTe/CdTe device has a larger voltage relative to the ideal than with CdTe only. This has largely been attributed to selenium passivation of bulk defects9.
Little research has been reported on the incorporation of CdSeTe into thinner (≤1.5 μm) CdTe absorbers. We have therefore investigated the characteristics of thin 0.5 μm CdSeTe/1.0 μm CdTe bilayer-absorber devices fabricated by close-space sublimation (CSS) to determine whether the benefits seen in thick bilayer absorbers are also attainable with thin bilayer absorbers. Such CdSeTe/CdTe absorbers, more than twice as thin as their thicker counterparts, offer a notable decrease in deposition time and material and lower manufacturing costs. Finally, they hold potential for future device architecture developments which require absorber thicknesses of less than 2 μm.
CSS deposition of absorbers in a single automated in-line vacuum system offers many advantages over other fabrication methods10,11. Faster deposition rates with CSS fabrication boosts device throughput and promotes larger experimental datasets. Additionally, the single vacuum environment of the CSS system in this work limits potential challenges with absorber interfaces. Thin-film PV devices have many interfaces, each of which can act as a recombination center for electrons and holes, thus reducing the overall device efficiency. The use of a single vacuum system for the CdSeTe, CdTe, and cadmium chloride (CdCl2) depositions (necessary for good absorber quality12,13,14,15,16) can produce a better interface and reduce interfacial defects.
The in-line automated vacuum system developed at Colorado State University10 is also advantageous in its scalability and repeatability. For example, deposition parameters are user-set, and the deposition process is automated such that the user does not need to make adjustments during absorber fabrication. Although small area research devices are fabricated in this system, the system design can be scaled up for larger area depositions, enabling a link between research-scale experimentation and module-scale implementation.
This protocol presents the fabrication methods used to manufacture 0.5-μm CdSeTe/1.0-μm CdTe thin-film PV devices. For comparison, a set of 1.5 μm CdTe devices are fabricated. Single and bilayer absorber structures have nominally identical deposition conditions in all process steps, excluding the CdSeTe deposition. To characterize whether thin CdSeTe/CdTe absorbers retain the same benefits demonstrated by their thicker counterparts, current density-voltage (J-V), quantum efficiency (QE), and PL measurements are performed on the thin single and bilayer absorber devices. An increase in short-circuit current density (JSC) as measured by J-V and QE, in addition to an increase in PL signal for the CdSeTe/CdTe vs. CdTe device, indicate that thin CdSeTe/CdTe devices fabricated by CSS show notable improvement in current collection, material quality, and device efficiency.
Although this work focuses on the benefits associated with the incorporation of a CdSeTe alloy into a CdTe PV device structure, the complete fabrication process for CdTe and CdSeTe/CdTe devices is described subsequently in full. Figure 1A,B shows completed device structures for CdTe and CdSeTe/CdTe devices respectively, comprised of a transparent conducting oxide (TCO)-coated glass substrate, n-type magnesium zinc oxide (MgZnO) emitter layer, p-type CdTe or CdSeTe/CdTe absorber with CdCl2 treatment and copper doping treatment, thin Te layer, and nickel back contact. Excluding the CSS absorber deposition, the fabrication conditions are identical between the single and bilayer structure. Thus, unless otherwise noted, each step is performed on both CdTe and CdSeTe/CdTe structures.
CAUTION: Gloves must be worn when handling substrates to prevent film contamination and material-to-skin contact. This fabrication process requires the handling of structures containing cadmium compounds; therefore, a lab coat and gloves should be worn in the lab at all times.
1. Substrate cleaning
2. Magnesium zinc oxide window layer sputter deposition
NOTE: This MgZnO sputter-deposition process utilizes an unbalanced magnetron and a 4" diameter, 0.25" thick target with a target-to-substrate distance of 15 cm. The target is 99.99% purity (MgO)11(ZnO)89 by percent weight.
3. Close-space sublimation deposition and treatment of absorber layers
4. Close-space sublimation copper treatment
5. Evaporation deposition of thin tellurium
6. Nickel back contact application
CAUTION: Due to the fumes from the Ni paint and methyl ethyl ketone (MEK), always run an overhead fan to cycle air during this process.
7. Delineation into 25 small-area devices
NOTE: To finish the thin film structure into electrically contact-able devices, the film stack must be delineated into small area devices such that the TCO front contact and Ni back contact are electrically accessible. This is done using a metal mask with mechanical removal of the semiconductor.
The addition of CdSeTe to a thin CdTe absorber improves device efficiency through superior absorber material quality and higher short-circuit current density (JSC). Figure 3A and Figure 3B, (adapted from Bothwell et al.8) show PL and TRPL, respectively, for the single CdTe absorber and CdSeTe/CdTe bilayer absorber devices. Both PL and TRPL measurements clearly show improved photoluminescence with the CdSeTe/CdTe bilayer absorber. The PL intensity improves by a factor of six, and the TRPL tail lifetime, fit with a single exponential to the slow part of the decay, is 12.6 ± 0.1 ns for the bilayer structure (compared to 1.6 ± 0.02 ns for the monolayer structure), which indicates better CdSeTe material quality. The PL measurement also verifies the successful incorporation of the CdSeTe layer. The shift in peak PL intensity, which corresponds to absorber band gap, from 1.50 to 1.42 eV, confirms that the lower band gap CdSeTe material is operative in the absorber layer.
Higher JSC in the bilayer absorber is demonstrated by current density-voltage (J-V) and quantum efficiency (QE) measurements, shown in Figure 4 and Figure 5, respectively. The shift in the light J-V curves along the current density axis shown in Figure 4 corresponds to a change in JSC from 24.0 mA/cm2 to 25.5 mA/cm2 for the best-performing CdTe and CdSeTe/CdTe devices respectively.
QE measurements of the CdTe and CdSeTe/CdTe devices (Figure 5A and Figure 5B, respectively) show the bilayer device’s additional photon conversion in the long wavelength range and corroborate the increase in JSC for that device. JSC values, determined by integrating the QE data over the wavelength range19 are 24.6 mA/cm2 for the CdTe device and 25.9 mA/cm2 for the CdSeTe/CdTe device. Employing optical transmission data measured on a 0.5 μm CdSeTe film, the QE data for the bilayer device is separated into current collected in the CdSeTe and CdTe layers8. This highlights the dominant role the CdSeTe plays in absorption. The current density collected in the CdSeTe layer is 22.9 mA/cm2 compared to 3.0 mA/cm2 in the CdTe layer, such that CdSeTe accounts for ~90% of the current collection in the bilayer absorber.
The effectiveness of a bilayer absorber depends on optimization of the fabrication process. Illuminated J-V data in Figure 6 demonstrate the importance of optimizing the CdSeTe:CdTe thickness ratio: the data show a significant kink in the non-optimal 1.25-µm CdSeTe/0.25-µm CdTe device. The kink, likely due to back barrier effects, generates a notable decrease in device efficiency to 11.0%. Optimized CdCl2 passivation is also vital to good device performance. Thin CdTe devices demonstrate sensitive dependence on CdCl2 deposition time18, and with no CdCl2 passivation, device efficiencies can fall to ~2%11. Although the authors have found CdCl2 passivation and the CdSeTe:CdTe thickness ratio to be among the most significant process conditions, optimization of all fabrication stages and parameters is necessary.
Figure 1: Device structure of completed CdTe-based photovoltaic devices. (A) A 1.5 μm CdTe absorber device structure was used as a reference for comparison with the bilayer structure. (B) A 0.5 μm CdSeTe/1.0 μm CdTe device structure was fabricated to improve photovoltaic efficiency. Please click here to view a larger version of this figure.
Figure 2: Automated in-line vacuum close-space sublimation deposition system. Shown is a 2D schematic providing configuration details of the sample holder, load lock, vacuum enclosure, and individual sources. Please click here to view a larger version of this figure.
Figure 3: Photoluminescence comparison of CdTe and CdSeTe/CdTe devices. (A) Peak PL intensity increases 6-fold with the incorporation of CdSeTe, and peak position shifts to a lower band gap, indicating the successful incorporation of CdSeTe. (B) TRPL tail lifetime, fit with a single exponential to the slow part of the decay, is notably longer for the CdSeTe/CdTe device than the CdTe device, which indicates better material properties of the CdSeTe layer. This figure is reprinted from Bothwell et al.8 Please click here to view a larger version of this figure.
Figure 4: J-V comparison of CdTe and CdSeTe/CdTe devices. J-V data under illumination show an increase in JSC, measured at the zero-voltage point, from 24.0 mA/cm2 to 25.5 mA/cm2 for the CdTe and CdSeTe/CdTe devices, respectively. Dark J-V data are also shown for comparison. Please click here to view a larger version of this figure.
Figure 5: QE comparison of CdTe and CdSeTe/CdTe devices. The (A) QE data of the CdTe device and (B) CdSeTe/CdTe device show an increase in JSC from 24.6 mA/cm2 to 25.9 mA/cm2, as determined by integrating the QE data over the wavelength range. Transmission measurements on a 0.5 μm CdSeTe film were used to separate the QE signal in (B) into current collected in the CdTe and CdSeTe layers: the CdSeTe layer constitutes ~90% of current collection in the 1.5 μm bilayer device. Please click here to view a larger version of this figure.
Figure 6: J-V comparison of optimized and non-optimized CdSeTe/CdTe devices. J-V data under illumination of a CdSeTe/CdTe device with a non-optimized CdSeTe:CdTe thickness ratio show a kink in the curve and reduction in the device efficiency, which emphasizes the importance of optimizing the CdSeTe:CdTe thickness ratio. Dark J-V data are also shown for comparison. Please click here to view a larger version of this figure.
Thin bilayer CdSeTe/CdTe photovoltaic devices demonstrate improvements in efficiency compared to their CdTe counterparts because of better material quality and increased current collection. Such enhanced efficiencies have been demonstrated in bilayer absorbers greater than 3 μm5,7, and now with optimized fabrication conditions, it has been demonstrated that increased efficiencies are also achievable for thinner, 1.5-μm bilayer absorbers.
The optimization of the fabrication process for thin bilayer absorbers is rooted in three main modifications: substrate preheat temperature, CdSeTe:CdTe thickness ratio, and CdCl2 passivation. For proper CdSeTe sublimation, the preheat temperature of the substrate should be ~540 °C compared to ~480 °C for CdTe sublimation, which is accomplished by varying the substrate dwell time in the preheat source. To prevent contact barriers in the device while maintaining good open circuit voltage (VOC), it was found that 0.5 μm CdSeTe/1.0 μm CdTe is the optimal ratio in the thin bilayer devices, as demonstrated in Figure 6. CdCl2 treatment of the bilayer absorber, essential for passivation of grain boundaries and promotion of grain growth and alignment12,13,14,15,16, can be especially sensitive in thin absorbers18. It was determined that a much less aggressive CdCl2 treatment, involving both source temperatures and dwell times, was needed to properly passivate the thin bilayer absorbers18 compared to thick bilayer absorbers5.
The CSS automated in-line vacuum system and multi-layer, multi-step fabrication process provides the opportunity for modifications throughout the device structure. The CdSeTe layer, sublimation-deposited from the CdSe20Te80 source in this study, can also be deposited by co-sublimation from CdSe and CdTe sources. Some initial work has been conducted at Colorado State University involving co-sublimation deposition of CdSeTe with limited success20. The CdSeTe/CdTe interface can also be adjusted by controlling the interdiffusion of the CdSeTe and CdTe layers.
There is no purposeful interdiffusion in the thin bilayer devices presented; however, interdiffusion of the layers is promoted in thicker bilayers and is accomplished by increasing the anneal time after CdCl2 deposition for a thermally driven interdiffusion process5. Control of the extent of interdiffusion allows for some band gap engineering of the bilayer absorber and can be used to adjust photon absorption profiles and current collection in completed devices. Different dopants, such as group-V dopants6,21,22, can also be incorporated to replace the historically used Cu dopant. Group-V doping offers higher achievable absorber doping levels of 1.0E17 cm-3, demonstrates long-term stability6, and can be incorporated seamlessly into the CSS-deposition process by using a doped source material for sublimation (currently being explored by colleagues at Colorado State University)23,24. Additional layers in the thin-film structure can also be modified in large or small ways if desired. Options include complete material removal or replacement, fabrication method changes, or variations in deposition conditions or post deposition treatments.
One bilayer property that makes the CdSeTe/CdTe absorber favorable compared to a CdTe absorber also serves as a limitation. The lower, 1.42 eV band gap of the bilayer absorber vs. the 1.50 eV band gap of the monolayer CdTe absorber increases photon collection for enhanced JSC, but the lower band gap also inherently limits the maximum achievable open-circuit voltage (VOC), thus limiting device efficiency. To mitigate this limitation, the next step in improving the thin CdSeTe/CdTe device structure is to incorporate a higher band gap material at the back of the device to increase VOC.
Modeling has demonstrated that the incorporation of a thin, ~100 nm, 1.8 eV material after the CdTe layer will create a conduction band barrier at the back and reduce back surface recombination by reflecting photoelectrons and forward current electrons away from the recombination-prone back surface25,26. This “electron reflector” structure requires a fully-depleted absorber such that the absorber thickness is limited to less than 2 μm25, making the thin bilayer absorber well-suited for this configuration. Cadmium magnesium telluride (CdMgTe), a high band gap CdTe alloy material, is an ideal candidate for this layer because of its tunable band gap and straightforward incorporation into the existing device fabrication process by co-sublimation or sputter deposition.
Increased device efficiency through enhanced current collection and photoluminescent properties of thin CdSeTe/CdTe bilayer devices is significant for fabrication time and cost reduction, and future improvements to the device structure and VOC. The CSS automated in-line vacuum system used for absorber deposition and passivation in this study is noteworthy for its deposition speed. Other fabrication methods such as sputtering and metal organic chemical vapor deposition (MOCVD) can take more than fifteen times as long for the same deposition27,28.
In-line CSS also offers scalability options. The fabrication processes used to make the small area research devices presented can be implemented in larger scale processes for PV module fabrication with minimal loss in fabrication parameterization. The CdSeTe/CdTe bilayer structure presented in this work also bears significance with its success using the very thin absorber. Specifically, device efficiency nearing 16% with only a 1.5-μm bilayer absorber demonstrates the benefit of CdSeTe to CdTe even in ultra-thin absorbers. Thin absorber layers such as these offer further fabrication time and material savings, and the opportunity to explore an electron reflector structure to minimize the voltage deficit present in CdSeTe/CdTe devices.
The authors have nothing to disclose.
The authors would like to thank Professor W.S. Sampath for use of his deposition systems, Kevan Cameron for system support, Dr. Amit Munshi for his work with thicker bilayer cells and supplemental footage of the in-line automated CSS vacuum deposition system, and Dr. Darius Kuciauskas for assistance with TRPL measurements. This material is based upon work supported by the U.S. Department of Energy’s Office of Energy Efficiency and Renewable Energy (EERE) under Solar Energy Technologies Office (SETO) Agreement Number DE-EE0007543.
Alpha Step Surface Profilometer | Tencor Instruments | 10-00020 | Instrument for measuring film thickness |
CdCl2 Material | 5N Plus | N/A | Material for absorber passivation treatment |
CdSeTe Semiconductor Material | 5N Plus | N/A | P-type semiconductor material for absorber layer |
CdTe Semiconductor Material | 5N Plus | N/A | P-type semiconductor material for absorber layer |
CESAR RF Power Generator | Advanced Energy | 61300050 | Power generator for MgZnO sputter deposition |
CuCl Material | Sigma Aldrich | N/A | Material for absorber doping |
Delineation Material | Kramer Industries Inc. | Melamine Type 3 60-80 mesh | Plastic beading material for film delineation |
Glovebox Enclosure | Vaniman Manufacturing Co. | Problast 3 | Glovebox enclosure for film delineation |
Gold Crystal | Kurt J. Lesker Company | KJLCRYSTAL6-G10 | Crystal for Te evaporation thickness monitor |
HVLP and Standard Gravity Feed Spray Gun Kit | Husky | HDK00600SG | Applicator spray gun for Ni paint back contact application |
MgZnO Sputter Target | Plasmaterials, Inc. | PLA285287489 | N-type emitter layer material |
Micro 90 Glass Cleaning Solution | Cole-Parmer | EW-18100-05 | Solution for initial glass cleaning |
NSG Tec10 Substrates | Pilkington | N/A | Transparent-conducting oxide glass for front electrical contact |
Super Shield Ni Conductive Coating | MG Chemicals | 841AR-3.78L | Conductive paint for back contact layer |
Te Material | Sigma Aldrich | MKBZ5843V | Material for back contact layer |
Thickness Monitor | R.D. Mathis Company | TM-100 | Instrument for programming and monitoring Te evaporation conditions |
Thinner 1 | MG Chemicals | 4351-1L | Paint thinner to mix with Ni for back contact layer |
Ultrasonic Cleaner 1 | L & R Electronics | Q28OH | Ultrasonic cleaner 1 for glass cleaning |
Ultrasonic Cleaner 2 | Ultrasonic Clean | 100S | Ultrasonic cleaner 2 for glass cleaning |
UV/VIS Lambda 2 Spectrometer | PerkinElmer | 166351 | Spectrometer used for transmission measurements on CdSeTe films |