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실리콘에 반원통형 공극이 있는 게르마늄 에피택셜 층의 전위 감소에 대한 이론적 계산 및 실험적 검증

JoVE Journal
Engineering

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JoVE Journal Engineering

Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon

Please note that all translations are automatically generated. Click here for the English version.

실리콘에 반원통형 공극이 있는 게르마늄 에피택셜 층의 전위 감소에 대한 이론적 계산 및 실험적 검증

1,980 Views

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06:57 min

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July 17, 2020

DOI:

10.3791/58897-v

DOI:

10.3791/58897-v

•

06:57 min

July 17, 2020

•

1 Views

Motoki Yako, Yasuhiko Ishikawa, Eiji Abe, Kazumi Wada³

¹Department of Materials Engineering,The University of Tokyo, ²Department of Electrical and Electronic Information Engineering,Toyohashi University of Technology, ³Department of Materials Science and Engineering,Massachusetts Institute of Technology

Tags

Dislocation Reduction Germanium Epitaxial Layers Semicylindrical Voids Silicon Threading Dislocation Density Selective Epitaxial Growth Boron-doped P-silicon Silicon Dioxide Photoresist Buffered Hydrofluoric Acid Germanium Growth

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