Conducting polymers have attracted great attention since the discovery of high conductivity in doped polyacetylene in 1977¹. They offer the advantages of low weight, easy tailoring of properties and a wide spectrum of applications^2,3. Due to sensitivity of conducting polymers to environmental conditions (e.g., air, oxygen, moisture, high temperature and chemical solutions), lithographic techniques present significant technical challenges when working with these materials⁴. For example, current photolithographic methods, such as ultra-violet (UV), are unsuitable for patterning the conducting polymers due to the involvement of wet and/or dry etching processes in these methods. In addition, current micro/nanosystems mainly have a planar form^5,6. One layer of structures is built on the top surfaces of another layer of fabricated features. Multiple layers of these structures are stacked together to form numerous devices on a common substrate. The sidewall surfaces of the microstructures have not been used in constructing devices. On the other hand, sidewall patterns could be used, for example, to build 3-D circuits, modify fluidic channels and direct horizontal growth of nanowires and nanotubes.

A macropunching method has been applied in the manufacturing industry to create macropatterns in a sheet metal for over a hundred years. Motivated by this approach, we have developed a micropunching lithography method (MPL) to overcome the obstacles of patterning conducting polymers and generating sidewall patterns. Like the macropunching method, the MPL also includes two operations (Fig. 1): (i) cutting; and (ii) drawing. The “cutting” operation was applied to pattern three conducting polymers⁴, polypyrrole (PPy), Poly(3,4-ethylenedioxythiophen)-poly(4-styrenesulphonate) (PEDOT) and polyaniline (PANI). It was also employed to create Al microstructures⁷. The fabricated microstructures of conducting polymers have been used as humidity⁸, chemical⁸, and glucose sensors⁹. Combined microstructures of Al and conducting polymers have been employed to fabricate capacitors and various heterojunctions^9,10,11. The “cutting” operation was also applied to generate submicron-patterns, such as 100- and 500-nm-wide PPy lines as well as 100-nm-wide Au wires. The “drawing” operation was employed for two applications: (i) produce Au sidewall patterns on high density polyethylene (HDPE) channels which could be used for building 3D microsystems^12,13,14, and (ii) fabricate polydimethylsiloxane (PDMS) micropillars on HDPE substrates to increase the contact angle of the channel¹⁵.